The invention relates generally to communication systems and more particularly to a method and apparatus for a high bandwidth multi-source interconnection that may be used in a communication network switch.
Data communication systems such as packet-based and cell-based communication systems send packets or cells of data through a network of switches. Each of the switches in the network is typically capable of receiving input data from a number of different sources and providing this input data to a number of different outputs. In doing so, the switch must be capable of buffering received data until it is possible to output that data on the appropriate output. Thus, a number of different output buffers are typically included within a switch where each output buffer corresponds to one of the outputs of the switch. The output buffer for a particular output recognizes data intended for that output from all of the received input sets of data and buffers the appropriate data until it can be inserted in the data stream provided on the corresponding output.
Output buffers typically include queuing elements that receive input data from one or more of the inputs to the switch. Each queuing element buffers the appropriate data received from the inputs and provides it such that it is combined with data from a number of other queuing elements to produce the output data stream. In order to control insertion of data to the output data stream by the plurality of queuing elements in a single output buffer, various prior art combination schemes have been developed.
One prior art scheme couples the outputs of all of the queuing elements together in a wired-OR configuration. An arbiter then controls when each of the queuing elements is able to assert its data on the wired-OR output, thus causing the output data stream to be generated based on the individual queuing elements independently driving the output. A block diagram of this prior art solution is illustrated in FIG. 3. One of the problems associated with this prior art solution is the degradation of the output signal based on reflections and other impedance mismatch artifacts that occur in a multi-source high-speed output. These effects can be substantial in switches that may be operating at a 5 Gigabits/second clocking rate. Another problem that arises is the inability to pinpoint faults that may arise in the circuit, as the outputs of all the queuing elements are connected.
In order to avoid the problems associated with the wired-OR solution illustrated in FIG. 3, an active device, such as a multiplexor, can be included in the system to insure a point-to-point connection between the queuing element and the active device. This point-to-point connection avoids the problems with impedance mismatches along a high-speed data line that was presented in the prior art implementation of FIG. 3. An example of a prior art solution utilizing an active device is illustrated in FIG. 4. The problems associated with this prior art solution include the requirement for an additional active device, such as the multiplexor 90 illustrated in FIG. 4. In addition to this, considering that each of the data connections between the queuing elements and the active device are often on the order of 16 bits, the number of tracks required to make these point-to-point connections in a printed circuit (PC) board implementation can be substantial. Thus, the tracks on the PC board can make the area required for such a circuit both overly expensive and complex.
Therefore, a need exists for a method and apparatus to allow high-speed multi-source interconnections using point-to-point buses that do not require the large number of tracks associated with prior art PC board implementations.